Japanese Patent Application Laid-open Publication No. 2008-60256 (Patent Document 1) describes a semiconductor device in which output pins protrude from one side of a sealing material while control pins protrude from a side opposite to the one side of the sealing material.
Japanese Patent Application Laid-open Publication No. 2008-21796 (Patent Document 2) describes a semiconductor device which includes a first semiconductor chip having an insulated gate bipolar transistor (hereinafter, referred to as “IGBT”) formed therein and a second semiconductor chip having a diode formed therein.
Japanese Patent Application Laid-open Publication No. 2011-86889 (Patent Document 3) describes a combined package including a plurality of unit packages in each of which a first semiconductor chip having an IGBT formed therein and a second semiconductor chip having a diode formed therein are sealed with the same sealing material.
Japanese Patent Application Laid-open Publications No. 2000-91500 (Patent Document 4), No. 2006-148098 (Patent Document 5), and No. 2013-98425 (Patent Document 6) describe a technique related to a power semiconductor module including an inverter that controls a switched reluctance motor (hereinafter, referred to as “SR motor” as abbreviated).